power dissipation造句
1. Features: Low collector saturation voltage, high power dissipation.
2. Moreover, its'voltage, electric current, power dissipation, and caloric value are very small.
3. The method has advantages of less power dissipation, device bulk also easier implementation.
4. By tests circuit properties and power dissipation come up to anticipated targets.
5. In higher viscosity and higher power dissipation rate per unit mass, micromixing ability of full-zone is better than paddle impeller.
6. They have a simple construction with low power dissipation and low output impedance and can be used as interfacing circuits in VLSI designs to reduce the number of external connections on a chip.
7. A power dissipation model of 4 H - SiC MPS was established.
8. Its power dissipation and propagation delay time are a tradeoff of the two comparators.
9. To reduce the power dissipation and chip size of digital calibration circuits of pipelined analog-to-digital converter(ADC), a new statistics-based background calibration technique is presented.
10. Processing speed and power dissipation are well optimized for special inputs with prejudgment for input data.
11. To erase the bootless power dissipation of the redundant leap of the clock, this paper proposes the RTL design of double edge triggered counter using parallelism and pipeline technique.
12. In order to reduce the power dissipation correlative with redundant states in sequential circuits and the redundant leap of the lock, low power design of decimal counter is proposed in this paper.
13. But also has the advantage of majority carrier MOSFET like fast switching speed thermal stabilization no secondary breakdown high input impendence and low driving power dissipation.
14. Compared with traditional flip - flops, new design can provide great improvement in working speed and power dissipation.
15. Internal synchronous - rectification control circuitry is provided to improve power dissipation during PWM operation.
16. SMU module adopts the clock-gating method was applied to the survivor path storage block, reduce the survivor path storage memory power dissipation effectively.
17. After function test and practical operation, it is confirmed that the YPH phase meter is highly reliable, stable in performance, easy in use, and low in power dissipation.
18. The EL1528 is a dual channel differential amplifier designed for driving full rate ADSL signals at very low power dissipation.
19. Features: High DC current gain, low saturation voltage, high col lector power dissipation.
20. This DC-DC converter chip can control a two-phase converter work automatically, which can provide a large output current, but has low power dissipation.
21. A new, single-ended sense amplifier is proposed to reduce the power dissipation in the current sensing scheme.
22. The results of practical measure and applications indicate that this water-meter has the characteristics of zero power dissipation, zero responding frequency, simple structure and high reliability.
23. In order to reduce the area size and the power dissipation, the filter is designed to have enough bandwidth to leave out the frequency tuning circuit.
24. Finally, we perform buffer sizing by a dynamic programming approach to further optimize the power dissipation.
25. DS90LV047A is a quad CMOS flow-through differential line driver designed for applications requiring ultra low power dissipation and high data rates.
26. Especially, the clock-racing multi-threshold flip-flop can decreases the leakage power and the power dissipation of clock network.
27. Active inductors are employed as loads to expand the bandwidth and to get stable DC operation points, and the direct-coupled technique is used to increase voltage gain and reduce power dissipation.
28. This , of course, has the direct benefit of reducing power dissipation.
29. Phototransistor. Collector-emitter voltage 30 V. Emitter-collector voltage 6 V. Collector current 20 mA. Power dissipation 100 mW.
30. Beginning from the mixed logical expression of the clocked signal, application of theory of transmission-clamping to design low power dissipation CMOS circuits using pulsed power is studied.
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